1. Field of the Invention
The present invention relates to a microcomputer incorporating an electrically reprogrammable non-volatile memory (non-volatile semiconductor memory), such as a flash memory, and, more particularly, to the functions of a non-volatile memory (hereinafter referred as “flash memory” as a typified type) at the time of rewriting the flash memory.
2. Description of the Prior Art
During the automatic write sequence and automatic erase sequence of a flash memory, generally data in the memory cannot be read out. In case of a microcomputer with a built-in flash memory, an execution program needs to be stored in a memory other than the flash memory, such as an internal RAM, at the time of writing or erasing of the flash memory. Even in case of performing writing or erase from an execution program in the flash memory, the CPU cannot fetch a next code until the automatic sequence is completed. This requires that the operation of the microcomputer be stopped temporarily.
For example, a microcomputer with a built-in NOR type flash memory takes a maximum of about several seconds for erasure, during which the CPU cannot access the flash memory. If an erase is executed from a program in a ROM, therefore, the CPU should be set in a hold state or the like until the erase is finished and cannot therefore accept an external interruption at all over a long period of time.
JP-A 02-257496(1990) discloses a microcomputer which, upon generation of a write interruption request while an erase/write voltage VPP is applied, stops and holds the count value of a timer and raises a voltage VPP temporarily to perform a process, such as reading, then raises the voltage VPP again and resumes application of the voltage from the count value held.
Because the conventional microcomputer with a built-in non-volatile memory has the above-described architecture, automatic erase requires about several seconds at the maximum. In a case where automatic erase is carried out from a program in the ROM, therefore, the microcomputer cannot fetch a next program code in the flash memory during that period of time. Once automatic erase is executed, the microcomputer should be disabled until the automatic erase is completed to permit a read operation. Even in a case where an interruption request is generated from a peripheral circuit or an external unit, the sequence from the generation of the interruption request to the point at which the execution of the interruption may take about several seconds at the maximum in some cases when the interruption vector is set at an address in the flash memory.
In a case where one cannot wait until automatic erase is completed, resetting should be enabled forcibly to interrupt the process of automatic collective erase or automatic block erase, followed by reading of memory data. In a case where resetting is enabled to interrupt the process of automatic collective or full erase or automatic block erase after which memory data is read out, therefore, automatic collective erase or automatic block erase must be executed from the beginning after memory data is read out.